english
version "1.0"
identify "xyz"
#: Copyright (c) 1995, 2003 by Wayne C. Gramlich.
#, All rights reserved.
#,
#, Permission to use, copy, modify, distribute, and sell this software
#, for any purpose is hereby granted without fee provided that the above
#, copyright notice and this permission are retained. The author makes
#, no representations about the suitability of this software for any purpose.
#, It is provided "as is" without express or implied warranty.
module check_types
#: This module implement some code for laying out printed circuit boards
#, doing schematic capture.
define component #: Box component in a diagram
record
board_part board_part #: {board_part
} if available
diagram diagram #: Diagram containing component
leads vector[component_lead] #: Leads making up the component
name string #: Component name
generate allocate, erase, identical, print
define component_lead #: Component lead
record
part_lead part_lead #: The part lead
component component #: Component lead is part of
junction junction #: Junction where lead is located
name string #: Lead name
generate address_get, allocate, identical, erase, print
define diagram #: A diagram/PCB
record
artwork_glyphs vector[diagram_glyph] #: Artwork glyphs
artwork_junctions vector[junction] #: Junctions for artwork layer
artwork_table table[point, junction] #: Artwork (x,y) to junction table
artwork_strings vector[diagram_text] #: String list for artwork layer
artwork_matrix matrix[diagram_text] #: String matrix for artwork layer
artwork_wires vector[wire] #: Artwork layer wires
back_artwork_glyphs vector[diagram_glyph] #: Bartwork glyphs
back_artwork_junctions vector[junction] #: Junctions for bartwork layer
back_artwork_table table[point, junction] #: Bartwork (x,y) to junc tbl
back_artwork_strings vector[diagram_text] #: List for bartwork layer
back_artwork_matrix matrix[diagram_text] #: Matrix for bartwork layer
back_artwork_wires vector[wire] #: Artwork layer wires
back_glyphs vector[diagram_glyph] #: Back glyphs
back_junctions vector[junction] #: Junctions for back layer
back_table table[point, junction] #: Back (x,y) to junction table
back_strings vector[diagram_text] #: String list for back layer
back_matrix matrix[diagram_text] #: String matrix for back layer
back_meshes vector[mesh] #: Vector fo back layer meshes
back_wires vector[wire] # Back layer wires
debug_stream out_stream #: Debug stream
error_stream out_stream #: Error stream
file_name string #: File name
front_glyphs vector[diagram_glyph] #: Front glyphs
front_junctions vector[junction] #: Junctions for front layer
front_table table[point, junction] #: Front (x,y) to junction table
front_strings vector[diagram_text] #: String list for front layer
front_matrix matrix[diagram_text] #: String matrix for front layer
front_meshes vector[mesh] #: Vector of front layer wire meshes
front_wires vector[wire] #: Front layer wires
geometry geometry #: Needed by read@board_data1()
glyph_table glyph_table #: Glyph table to use
lookup_point point #: Temporary point for lookups
schematic_capture logical #: {true
}=>schematic;{false
}=>PCB
text_temporary string #: Temporary string buffer
generate allocate, erase, identical, print
define diagram_glyph #: One glyph from diagram
record
diagram diagram #: Corresponding digram
glyph glyph #: Corresponding glyph
junctions vector[junction] #: Junctions attached to glyph
x unsigned #: x coordinate
y unsigned #: y coordinate
generate allocate, erase, identical, print
define diagram_text #: Some text from the diagram
record
diagram diagram #: Diagram containing text
size unsigned #: Number of characters in text
used logical #: {true
}=>identified in diagram
value string #: String representation of the value
x unsigned #: x coordinate
y unsigned #: y coordinate
generate allocate, erase, identical, print
define junction #: A meeting of wires/lines:
record
component_lead component_lead #: If present, junction is comp. lead
diagram diagram #: Diagram that junction is part of
glyph_lead glyph_lead #: If present, junction is glyph lead
name string #: Via name (or empty)
point point #: (x, y) coordinate of junction
via logical #: {true
}=>via/connection present
wires vector[wire] #: All wires
generate address_get, allocate, erase, identical, print
define mesh #: A bunch of connected wires
record
diagram diagram #: {diagram
} containing mesh
wires vector[wire] #: Each of the connected wires
x_maximum unsigned #: Maximum x coordinate
x_minimum unsigned #: Minimum x coordinate
y_maximum unsigned #: Maximum y coordinate
y_minimum unsigned #: Minimum y coordinate
generate address_get, allocate, erase, identical, print
define point #: An (x, y) coordinate
record
x unsigned #: X coordinate
y unsigned #: Y coordinate
generate allocate, equal, erase, hash, print
define wire #: A wire/line between two junctions
record
junction1 junction #: One end-point of wire
junction2 junction #: Other end-ponint of wire
mesh mesh #: Mesh wire is connected to
generate address_get, allocate, erase, print